Receivers for phase comparison radio navigation systems

ABSTRACT

In a receiver for a phase comparison radio navigation system in which fixed stations normally radiate signals, one from each station on different harmonics of a common fundamental frequency and in which, for lane identification, each station periodically radiates simultaneously signals of a number of frequencies, known as a multipulse, from which a signal of the fundamental frequency may be derived at the receiver, the receiver has an oscillator locked in phase to signals of the one frequency normally radiated from the master station. The output of this oscillator is divided down to the fundamental frequency but the divider is not notched. Instead the phase relationship between the fundamental frequency signal from the master multipulse transmissions and the divider output signal are compared digitally in phase and the phase difference is stored as a digital number and applied as a correction to all the phase determinations between the divider output and the fundamental frequency signals derived from the slave stations. This corrects not only for the absence of notching in the divider but also for certain other minor phase errors in the system.

Unite States atent Hughes [451 Dec. 19, 1972 54] RECEIVERS FOR PHASE COMPARISON RADIO NAVIGATION SYSTEMS [72] Inventor: David Geoffrey Hughes, London,

England [73] Assignee: Decca Limited, London, England [22] Filed: Nov. 10, 1970 [21] Appl. No.: 88,398

[30] Foreign Application Priority Data Nov. 10, 1969 Great Britain ..54,971/69 [52] US. Cl. .....343/105 R [51] Int. Cl ..G0ls H30 [58] Field of Search ..343/l05 R [56] References Cited FOREIGN PATENTS OR APPLICATIONS 1,016,981 1/1966 Great Britain ..343/105 R Primary Examiner-Benjamin A. Borchelt Assistant ExaminerRichard E. Berger Attorney-Mawhinney and Mawhinney [5 7 ABSTRACT In a receiver for a phase comparison radio navigation system in which fixed stations normally radiate signals, one from each station on different harmonics of a common fundamental frequency and in which, for lane identification, each station periodically radiates simultaneously signals of a number of frequencies, known as a multipulse, from which a signal of the fundamental frequency may be derived at the receiver, the receiver has an oscillator locked in phase to signals of the one frequency normally radiated from the master station. The output of this oscillator is divided down to the fundamental frequency but the divider is not notched. Instead the phase relationship between the fundamental frequency signal from the master multipulse transmissions and the divider output signal are compared digitally in phase and the phase difierence is stored as a digital number and applied as a correction to all the phase determinations between the divider output and the fundamental frequency signals derived from the slave stations. This corrects not only for the absence of notching in the divider but also for certain other minor phase errors in the system.

9 Claims, 6 Drawing Figures /02 NUMERICAL l 39 35 :READUUL/74 E1 0 I r BINARY/ I '3 7 enu 10 cu arn V l MULTIPULSE I IUECUUING. I cmcun. [8/ /7 i- X I /47 14/ 7L /79 I 4 PASE M //6 /57 SURE I '1 L1. 1464 68 W3 l swncnme g I l LOGIC. 142 14 1 l P'" 45 i \l a a? STUSRE I .a REBI TER. 3UOF I63 I l /43 i a V /52 I 'IU/B/E L- -:s I .n. DISPLAY 5 Lit M6 REGISTER.

lMER BiAm1- "'l l PATENTED 19 3, 706, 995

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FIGURE-JG. FIGURES.

IN VENTOR $A VID GEM-FEE! HUGHES 3; MAMHINMY a M MWHINNfiY ATTOR S RECEIVERS lFOR PHASE COMPARISON RADIO NAVIGATION SYSTEMS BACKGROUND OF THE INVENTION 1. Field of the Invention This invention relates to receivers for phase comparison radio navigation systems of the kind in which a phase comparison is made between signals of different but harmonically related frequencies from three or four fixed stations which radiate signals in a fixed phase relation.

2. Description of the Prior Art The three or four ground stations which radiate signals in a fixed phase relation are known as a chain. In a typical chain of the system known as the Decca (Registered Trade Mark) Navigator system, there is a master station normally radiating signals of frequency 6f and three slave stations, known as the red, green and purple slaves, normally radiating signals of frequency 8f, 9f and 5f where f is the fundamental frequency for the chain. Different chains use slightly different values of f and the receiver may therefore be provided with heterodyning means, using a heterodyne signal of frequency A =f+ F, where F is a fixed frequency. Each received signal of frequency nfis mixed with a signal of frequency n A and the lower side band of frequency nF is selected. The phase comparisons for a single chain receiver may thus be made using comparison circuits comparing the 6f received signals with each'of the 8f, 9f and 5f received signals. More generally, however, in a receiver for use with many different chains, the 6F signals may be compared in phase with the 8P, 9F and SF signals. For simplicity in the following description, reference will be made more particularly to the more general case where the signals available in the receiver are of frequencies 6E, 8F, 9F and SF although the invention is equally applicable to a nonheterodyne receiver, i.e. F may be the same asf.

The present invention is more particularly concerned with a system in which, in the receiver, there is an oscillator locked in phase to one of the received signals; usually this will be a 6F oscillator locked to the signals from the master station and in which the signals from the oscillator are divided down in a frequency divider to give a 1F output for lane identification. In systems of this kind, highly accurate positional information is obtainable in the receiver by phase comparison of pairs of signals (usually comparison of the master signal separately with each of the slave signals, each comparison being made at the lowest common multiple frequency of the pair being compared). This information however is ambiguous since the spacing of the stations is such that many complete cycles of phase change occur in traversing the operational area of the system. To provide coarser but less ambiguous positional information, phase comparisons are made at a lower frequency. To enable a comparison to be made at a frequency 1F, each station is arranged to radiate simultaneously signals of two or more frequencies such that a llF signal may be derived at the receiver from the combined radiations from the station. To minimize the number of frequencies required, the practice is to interrupt the normally radiated signals from other stations so that these frequencies can be utilized simultaneously at one station. In the Decca (Registered Trade Mark) Navigator system, at present the practice is to radiate all four frequencies together from each station in turn; the radiation of the multiple frequencies from each station is of short duration and is known as a multipulse. The 1F signals derived at the receiver from the multipulses from the slave stations may be compared with the IF signal obtained at the receiver by dividing down the 6P output from the oscillator phase locked to the master station (it will be remembered that the master station transmissions must be interrupted during the slave multipulse transmissions). Heretofore it has been necessary to notch the divider dividing down the 6F locked oscillator output, that is to say the IF output from the divider has to be related to a particular one of the six cycles of the 6F signal which occur in each cycle of the 1F. Otherwise there may be phase errors of or multiples of 60 in comparing the IF divider output with the received multipulse signals. This has required the provision of special circuits to effect the notching of the divider. It is an object of the present invention to provide an improved form of receiver in which the necessity for notching such a divider is avoided. As will be explained hereinafter, with the present invention, certain minor phase errors are also inherently corrected.

SUMMARY OF THE INVENTION According to this invention, in a receiver for a phase comparison radio navigation system of the kind in which fixed stations normally radiate signals, one from each station, on different harmonics of a common radiation fundamental frequency and in which, for lane identification, each station periodically radiates signals of two or more frequencies from which a signal of the fundamental frequency may be derived at the receiver, said receiver having an oscillator locked in phase to signals of the one frequency normally radiated from one station, and a divider for dividing down the output from the oscillator to the receiver fundamental frequency, there are provided means for determining the phase relation between the receiver fundamental frequency signal derived from the multiple frequency transmissions from said one station and the receiver fundamental frequency signal from the divider and means for automatically applying this phase determination as a correction to determinations of the phase relation between the divider output and the receiver fundamental frequency signals derived from the multiple frequency transmissions from each of the other stations. By this arrangement a correction is effected to each of the determinations which corrects not only for the errors due to absence of notching of the divider but also for any other phase errors in the system between the take-off point for the fundamental frequency signals derived from the multiple frequency transmissions and the oscillator locking circuit.

As has previously been explained, the radiation fundamental frequency in the Decca (Registered Trade Mark) Navigator system is f. The receiver fundamental frequency for a single chain receiver may be f but more generally the receiver fundamental frequency is F. The present invention is concerned with the receiver and, except where the context clearly implies otherwise, the expression fundamental frequency always refers to the receiver fundamental frequency.

l060l l 0827 Most conveniently, these phase determinations are made digitally by counting clock pulses into a register for the time period corresponding to the phase difference to be measured, using the signals to be compared in phase to gate the clock pulses. Since once a divider is set in operation the notching will not normally change, the determination need usually only be made when the equipment is set in operation. The aforementioned means for determining the phase relation between the fundamental frequency signal derived from the multiple frequency transmissions from said one station and the fundamental frequency signal from the divider thus preferably comprises a register referred to as the phase correction register for counting clock pulses to determine the time period corresponding to the phase difference to be measured. Conveniently said divider is a digital divider of the cycle counter type providing a chain of short duration pulses at the fundamental frequency. Means, eg a manually operable push-button switch, may be provided for initiating the effecting of the phase determination between the multiple frequency transmissions from said one station and the divided down output from the oscillator. The determination is stored in digital form in said phase correction register and the number stored in this phase correction register may be applied, as a correction, to another register in which the clock pulses are counted for the subsequent phase determinations.

The means for determining the phase relation between the divider output and the fundamental frequency signal derived from the multiple frequency transmissions from each of the stations other than said one station also conveniently comprises a register for counting clock pulses to determine the time period corresponding to the phase difference to be measured; in this case means are provided for correcting the count using the number in the phase correction register so that the corrected number represents the phase relation between signals from the slave station and signals from the master station. The phase of the divider output thus becomes immaterial.

Preferably, in each cycle of multiple frequency signals, the phase relation is determined and indicated between the divider output and the fundamental frequency derived from the multiple frequency transmissions from said one station, with the correction applied. This should be zero and any departure from zero indicates that the correction should be re-determined.

The clock pulses are preferably derived from a clock pulse source having a frequency which is a multiple of the fundamental frequency. In a receiver for use in a system having a master station normally radiating on the sixth harmonic of said common radiation fundamental frequency and slave stations normally radiating on the fifth eighth and ninth harmonics, the clock source conveniently has a frequency 300 times the receiver fundamental frequency.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a perspective view of a receiver and display unit for a phase comparison radio navigation system;

FIG. 2 is a schematic diagram of a radio frequency/intermediate frequency unit forming part of the receiver of FIG. l and including also certain controls;

FIG. 3 is a schematic diagram of a locked oscillator unit of the receiver of FIG. 1 showing also certain display indicators;

FIG. 4 is a schematic diagram of a heterodyne and 5 locked oscillator unit of the receiver of FIG. 1, showing also certain further controls;

FIG. 5 is a schematic diagram of a lane identification and timer unit of the receiver of FIG. ll together with a further display unit; and

FIG. 6 is a diagram showing how FIGS. 2, 3 4 and 5 fit together to form the complete receiver display system.

DESCRIPTION OF THE PREFERRED EMBODIMENT The receiver and display unit shown in the drawings is for use with fixed transmitting stations of the Decca (Registered Trade Mark) system. Each chain of transmitters comprises a master station and usually three slave stations, known as the red, green and purple slaves. The master station normally radiates continuous signals of a frequency 6f where f is a fundamental frequency of the order of 14 kHz. The red, green and purple slaves normally radiate on frequencies 8f, 9f and 5f. All the radiated signals are locked in phase. Periodi cally the transmissions from all the stations are interrupted and a short duration signal of all the frequencies Sf, 6f, 8f and 9f in fixed phase relation is radiated from one station. This signal is referred to as the multipulse signal. The multipulse signal is radiated in sequence from the master station and the red, green and purple slaves. Each multipulse transmission is preceded by a break of 0.1 seconds in the normal master (6f) transmission.

The normal transmissions are utilized in a mobile receiver by separately comparing the phase of each of the received slave signals (8f, 9f and 5)) with the received master 6f signals. The comparisons are effectively at the lowest common multiple frequencies. The phase angle is indicated to provide fine positional information with respect to three sets of hyperbolic position lines. This final positional information corresponds to the phase angle within a cycle but is ambiguous in that each hyperbolic pattern covers many complete cycles. The various different cycles of the pattern are referred to as lanes. The multipulse signals are used for lane identification. In this receiver the effective comparison frequency employed is the fundamental frequency. A phase measurement at this frequency gives a coarser indication which serves to identify a lane within a zone, a zone being 24 lanes for the red pattern, 18 lanes for the green pattern and lanes for the purple pattern.

The receiver can be utilized with any of a number of different chains. The different chains have fundamental frequencies which differ by small amounts. This is achieved, as will be more fully explained later by superheterodyne operation to convert the received signals of 5f, 6f, 8fand 9fto 5F, 6E, 8F and @F by mixing with the appropriate harmonics of a hererodyne frequency A where A f F, using the lower side bands of the mixer outputs. Thus the normal phase comparison is effected in the circuitry at the frequencies 24F for red, 18F for green and 30F for purple whilst the lane identification has a comparison frequency of IF, although the effective frequencies are 24f, 18f and 30f for the normal patterns and l f for lane identification.

l060ll 0828 Referring now to FIG. 1, the receiver and display unit illustrated is particularly for marine use and comprises a base with a trunnion mounted display unit 11 containing all the circuitry which, with the exception of a cold-cathode number tube display, is all solidstate utilizing printed circuit boards. The power supplies are provided by a power supply unit (not shown) fitting onto the bottom of the assembly of FIG. 1, this power supply unit being interchangeable so that an appropriate unit may be fitted according as to whether the external supply is AC. or D.C. and to its voltage and frequency.

In the upper part of the unit 1 l are the red, green and purple fractional lane indicators 12, 13 and 14 (known 7 as decometers), each comprising a pointer. rotatable over a dial. Associated with each of the fractional lane indicators are integrating lane counters in the form of rotating discs. It will be seen that each fractional lane indicator has a lane indicator 15 and a zone indicator 16. The lane indication from the multiple signals is shown on a three digit cold cathode number tube display 17.

The panel of the upper unit also includes a lock lamp" 18 to be described later, a lane identification zero push button 19 and a dimmer control 20 for the display 17.

In the lower part of the assembly, a hinged cover 21 is provided for covering certain controls, primarily for setting up, these controls being a pair of multiposition switches 22, 23 for chain selection, zero setting controls 24, 25 and 26 for the three decometers and a function switch 27.

Referring now to FIGS. 2 to S, the main units, each formed by a single circuit board and indicated by dashed line boxes, are an R.F/I.F unit 30 (shown in FIG. 2), a heterodyne and reference oscillator unit 32 (shown in FIG. 4), a locked oscillator unit 33 (shown in FIG. 3) and a lane identification and timer 34 (shown in FIG. 5) with which is associated a smaller board 35 (also shown in FIG. 5) for the display 17. FIGS. 2 to 5 fit together as shown in FIG. 6.

An aerial (FIG. 2) is connected via a buffer/limiter 41 and gate 42 to amplifiers 43, 44, 45 and 46 tuned respectively to 5f, 8f, 9f and 6f but of sufficient bandwidth to amplify signals from any selected chain. The outputs from these amplifiers are fed respectively to mixers 47, 48, 49 and 50 where they are mixed with the appropriate harmonics of the A signals from the unit 32. For this purpose, the A signals on a lead 51 from unit 32 are fed to multipliers 52, 53, 54 and 55 to provide the appropriate harmonics. Associated with the multipliers 52, 53 and 54 respectively are the zero setting controls 26, 24 and 25 which, although shown within the box 30 of FIG. 2, are located on the lower panel as shown in FIG. 1. The required sidebands of SF, 8F, 9F and 6F from the mixers 47, 48, 49 and 50 are selected by band pass filters 56, 57, 58 and 59 and the filter outputs are amplified by amplifiers 60, 61, 62 and 63 and are passed to phase discriminators 64, 65, 66 and 67 where the received signals are respectively compared in phase with signals of the same frequencies from oscillators 68, 69, 70 and 71 in the unit 33 (FIG. 4). The phase discriminators 64, 65, 66 and 67 are of the sampling type, the outputs of the oscillators 68, 69, 70 71 being fed to pulse producing circuits 72, 73, 74, 75 respectively to provide the short duration sampling pulses for applying to the phase discriminators. The phase discriminators are sine output discriminators, there being zero outputs when the oscillator outputs are in phase with the received signals; the discriminator outputs are thus D.C. voltages and they are applied to integrator/reactors 76, 77, 78 and 79 (FIG. 4) to control the respective oscillator frequencies. In two positions, LOCK 1 and LOCK 2 of the function switch 27 (FIG. 2), fast lock switching is applied via a lead 28 to the integrator/reactors 76, 77, 78 and 79. These integrator/reactors serve to control the frequencies of the respective oscillators so as to maintain a phase lock between each oscillator output and the respective input from the amplifiers 60, 61, 62 and 63. A further description of the oscillator control loop is given in the specification of US. Pat. No. 3,603,893 entitled Phase Locked Oscillators."

The pulse outputs from the oscillators 68, 69 and (at frequencies SF, SF and 9F respectively) are fed to frequency multipliers 80, 81 and 82 to give signals at frequencies 30F, 24F and 18F respectively. Considering the 30F signal from the multiplier 80, this signal is fed directly to a sine output phase discriminator 83 and is also fed via a quadrature phase shifter 84 to a cosine phase discriminator 85. These are sampling type phase discriminators, the sampling pulses being at 6F from the oscillator 71 via the pulse shaper and an amplifier 87. The sine and cosine outputs from the phase discriminators 83, 85 are applied via d.c. amplifiers 88, 89 to the purple decometer 14. Similarly the red decometer 12 is driven by phase discriminators 90, 91 and dc. amplifiers 92, 93 to indicate the phase relation between the SF and 6F signals and the green decometer I3 is driven by phase discriminators 94, 95 and dc. amplifiers 96, 97 to indicate the phase relation between the 9F and 6F signals. It will be noted that, by using locked oscillators to drive the decometers, the locked oscillators perform effectively as very narrow band filters, providing continuous noise-free drive to the decometers and bridging the interruptions in received signals during the short signalling breaks and during the multipulse transmissions.

Each of the decometers 12, 13 and 14 has a rotor carrying a pointer which traverses a circular scale. The angular position of the rotor is determined by the relative magnitudes and polarities of d.c. signals applied to orthogonal coils of the decometer. These do. signals are obtained from the dc. amplifiers 88, 89 for the purple decometer and the corresponding amplifiers for the other decometers and hence correspond to the sine and cosine of the phase angle between the master and respective slave signals as received at the receiver. The angular position of the rotors thus corresponding to the phase angle. The changes of phase angle are mechanically integrated and complete cycles of phase change are indicated by the associated lane indicator 15 which is driven through a reduction gear from the decometer rotor. The zone indicator 16 for each decometer is likewise driven through further reduction gearing from the lane indicator.

The decometers may be adjusted manually by means of manual control knobs 180. Operation of these controls enables the lane and zone indicators to be reset but the rotor of each phase angle indicator will take up a position corresponding to the measured phase angle.

These knobs 180 therefore enable the lane and zone indicators 15, 16 to be reset without affecting the accuracy of the positional information from the phase angle measurement within a cycle.

The 6F pulse output from the pulse shaper 75 is used not only as the sampling pulse for the phase discriminators driving the three decometers 12, 13 and 14 and in the phase lock control loop for the 6F oscillator 71 but is fed also to a frequency divider 98 to give 1F pulses for purposes to be described later and is also fed via a quadrature phase shifter 99 to a cosine phase discriminator 100 (FIG. 2). In this discriminator 100, the 6F signals from amplifier 63 are sampled. This discriminator 100 thus gives its maximum output so long as the normal 6F signals from the master station are being received and the 6F oscillator 71 in the receiver is locked in phase to the 6F signals from amplifier 63.

The output from the discriminator 100 is fed via a lead 101 to an amplifier 110 in the heterodyne and reference oscillators 32 (FIG. 4). The output from the amplifier 110 is fed to the lock lamp 18 which will thus blink if the oscillator 71 is not properly phase locked. If the oscillator 71 is locked, the lamp 18 will remain continuously lit except during the multipulses and the breaks in the master transmissions immediately before the multipulses. The amplifier 110 also provides the input to a break detector 111 to detect the restoration of the 0.1 second after the break and so give an output signal which indicates the start of each multipulse.

The heterodyne and reference oscillator 32 contains a frequency synthesizer providing the heterodyne frequency A and also a reference oscillator for referencing the receiver.

The frequency synthesizer comprises a 436.907 kHz crystal oscillator 120 feeding a divider train 121 and a matrix 122 for combining the divider train outputs, the matrix 122 being controlled by the aforementioned chain selector switches 22, 23. The synthesized frequency output from the matrix is used to control the frequency of a heterodyne oscillator 123 having a phase lock control loop consisting ofa sawtooth output discriminator 124 giving a dc. output voltage applied to a reactor 125 controlling the oscillator frequency. The A frequency output from the oscillator 123 is used for frequency changing in the aforementioned mixers 47, 48, 49 and 50. The reference oscillator for referencing the receiver is an 8F oscillator 130. This oscillator is phase locked to the 1F pulses from the aforementioned divider 98 (FIG. 3), these pulses. being applied via a lead 102 to a linear phase discriminator 131 (FIG. 4) having 1F sampling pulses from a divideby-eight divider 132 fed from the output of oscillator 130 and the dc. output voltage of discriminator 131 being applied to a reactor 133 to control the frequency of oscillator 130. The IF output from the divider 132 is converted into 1f pulse signals by means of a mixer 134, receiving A frequency signals from oscillator 123, and a pulse shaper 135. The 1f pulses from the shaper 135 can be applied to the receiver input channels 43, 44, 45 and 46 (FIG. 2) via a gate 136. This gate 136 and the aforementioned gate 42 are controlled by the function switch 27; normally only the received signals are applied to the receiver input channels but, when the function switch 27 is in the Reference position, these signals are disconnected from the receiver channels by closing gate 42 and the 1f pulses are applied by opening gate 136. These pulses form a series of harmonics of the frequency 1f in a fixed multiple phase relation and the decometers 12, 13 and 14 are set to zero using the zero setting controls 24, 25 and 26. During referencing, the 6F oscillator 71 is not locked to received signals but the stability of this oscillator is such as to maintain the frequency of the reference oscillator very closely during the referencing operation.

The lane identification is obtained by measuring the phase lag of an effective 1 f signal from each slave station compared with a 1f signal from the master station. 7

These 1f signals from the slaves are provided by the multipulse transmissions and are used after frequency changing to 1F. The master oscillator 71 provides the master 1F reference.

The multipulse signals for lane identification purposes are obtained in the receiver by combining the outputs at SF, SF, 9F and 6F from the amplifiers 60, 61 62 and 63 in a multipulse circuit 140 (FIG. 5). The phase relationship of the radiated 5f, 3f, 3f and 6f signals in each multipulse transmission is such that they combine to give a peak pulse at a frequency 1f. Thus the SF, 8F, 9F and 6F signals from the amplifiers 60, 61, 62 and 63 give a peak pulse at a frequency 1F and this is used to set a bistable 141 which is reset by the 1F output from the frequency divider 98 (FIG. 3) on lead 139. The bistable 141 (FIG. 5) controls a gate 142. The multipulse signal has a duration of a fraction of a second but contains many cycles at 1F. The gate 142 is cocked by a short duration lane identification read time pulse, referred to as the second L. I pulse obtained on a lead 151 from switching logic 147 to be described later. The gate 142 is cocked only-for the duration of this second L.I pulse and serves only to pass pulses during one time period starting on a 1F multipulse signal and ended by the next IF pulse from the divider 98. The gate 142 gates pulses from a 300F oscillator 143 into a store 144 via an OR gate 145. The multipulse circuit 140, from the received multipulse 1F signals, thus effectively provides one pulse synchronized with the effective 1F from the multipulse. This pulse opens the gate 142 and the next 1F signal from the divider 98 closes the gate. The multipulse signal will therefore produce a stored count in store 144 proportional to the multipulse-to-master delay, i.e. proportional to the complement of the Master:Multipulse zone pattern phase angle in 1/300th zone units. The total capacity of the store 144 corresponds to one complete cycle at 1F, i.e. a count of 300 at 3001 The required lane identification is obtained by determining the residual capacity in the store 144, this being done by filling the store until it overflows and determining the quantity required in l/300th zone units for purple but in l/240th zone units for red and 1/180th zone units for green. To do this, the store 144 is filled from the 300F oscillator 143 via a divider 146 which divides by a factor of 10 or eight or six under the control of lane identification switching logic 147, to be described later, the division factor being 10 for purple, eight for red and six for green. The divider output is fed to the store 144 via the OR gate 145. Simultaneously, the 300F signals from the oscillator 143 are fed via a 10 to one divider 148 and a gate 149 into a display register 150. The gate 149 is a two input AND gate having, as a second input a pulse signal derived from a pulse generator 152 which is started by a pulse, known as the fourth Ll pulse from the logic unit 147 on lead 153 and terminated by a stop pulse from the register 144 when the latter is full. The fourth Ll pulse is a timing pulse slightly delayed after the second Ll pulse. Thus, considering the red lane identification, the divider 146 is set to divide by eight and so the ratio of the number of pulses fed into the display register 151) to the number fed into the store 144 is eight to 10. Similarly for the green lane identification, the ratio is six to 10. Thus, although the pulses fed into the store 144 are in units of l/300th of a zone, those fed into the display register are in units of 1/240th of a zone for red, 1/180th of a zone for green and l/300th of a zone for purple; in other words they now correspond to one tenth of a lane for each of the patterns.

The display register 150 has to be filled only during the time taken for the store register 144 to be filled after the initial count of the complement of the master to multipulse period. To do this the display register has to be reset for the start of the required period and the gate 149 closed when the store register 144 is completely full. This closing of the gate 149 is effected by an outout signal from register 144 when this store register is full. The display register is reset for each multipulse by a first Ll pulse from the switching logic 147. In the Decca (Registered Trade Mark) Navigator system, to avoid any possibility of confusion between readings on different patterns, the 24 lanes in a red zone are numbered from to 23 and thus a red lane identification (to a tenth of a lane) is expressed as a number between 0 and 23.9. The 18 lanes in a green zone are numbered from 30 to 47 and so the green lane identification is expressed as a number between 30 and 47.9. The 30 lanes in a purple zone are numbered from 50 to 79 and so the purple lane identification is expressed as a number between 50 and 79.9. For these reasons, the display register 150 is set to zero at the beginning of the red lane identification count into that register, to 30 at the beginning of the green count into that register and to 50 at the beginning of the purple count into that register. The switching logic 147, in resetting the display register, therefore has appropriately to set the most significant decimal digit of the display register which is a binary coded decimal counter.

The lane identification switching logic 147 provides output gating signals referred to as the first Ll pulse, on four leads 160, 161, 162 and 163 indicating the start of the master, red, green and purple multipulse transmissions respectively, these signals being used for setting the divider 146 to divide by the appropriate factor and to reset the display register 150 before the start of each count into that register. For this purpose, the switching logic 147 makes use of the break detector 111, and time division of 26.6 Hz and 13.3 Hz signals from the divider train 121 to provide a cycle of approximately 20 second period during which an output appears successively on the leads 1611, 161, 162 and 163 at 2.5 second intervals. The master multipulse is the first of each sequence of four pulses and is identified thereby in the switching logic. The first Ll pulse for each multipulse which is used for setting the store register 144 via lead 158 is timed to occur in the latter half of the multipulse period and is timed to occur about 0.3 to 0.4 of a second after the break in the master transmission. The second, third and fourth LI pulses follow the first LI pulse in each multipulse with small sequential delays appropriate for their respective logical operations.

The master multipulse Ll signal on lead is applied, by means of an OR gate 164, to the divider 146 and display register 150 in the same way as the red multipulse signal and is utilized for zeroing the lane identification outputs. In the receiver described, the frequency divider 98 dividing the 6F oscillator output down to IP is not notched, that is to say, the 1P output is not locked to any specific one of the six cycles of the 6F signal. There is therefore a sixfold possible ambiguity in the phase relation of the 1F output from divider 98 with respect to the IF multipulse from the master station fed to the multipulse circuit 144. A correction is therefore put in the store register 144 to bring the lane identification reading on display register 150 to zero on the master multipulse transmission and this same correction is used for each of the other multipulse transmissions thereby correcting for the absence of notching on the divider 98 and also correcting for any other phase errors which might arise between the multipulse take-off and the master oscillator (6F oscillator 71) locking circuit. This correction is effected using a phase store and a bistable 171. The bistable 171 can be set by depressing the lane identification zero push button 19 and it then provides a signal to a gate 172, which gate, when opened admits 30F pulses from divider 148 into the phase store 170. The bistable 171 is reset the next time the store register 144 is completely filled. The gate 172 is a four input AND gate and has an input on lead 156 from logic unit 147 so that the gate 172 is open only during master multipulse transmissions and not during slave multipulse transmissions. The fourth input to gate 172 is a third Ll pulse on lead 157 from logic unit 147 so that the gate is only opened for the required appropriate time duration during the master multipulse transmission. The number of 311 pulses fed into the phase store 170 via the gate 172 is thus the same as the number fed into the display register 150. The reason for the four inputs to gate 172 is to ensure that the phase error reading is injected into store 170 at the third LI pulse only when the button 19 is pressed and only on a master multipulse transmission. The pulses from gate 172 are also fed via lead 173 into gate 145 and thus into the store register 144. When this register is full, it spills over and bistable 171 is reset. Thus the phase store 170 has the required correction and register 144 is in the zero state. Gate 181 ensures that the bistable 171 is reset only between the third and fourth LI pulses. This prevents bistable 171 being reset too early if the zero button 19 is pressed for example, immediately after the previous master lane identification.

The number thus put in the phase store 170 is then applied as an initial input to the store register 144 each time the latter is reset by the first Ll pulse. Functionally, it is required that the phase store 170 should contain the phase reading on the master multipulse transmissions and thus the button 19 should be depressed before a master multipulse transmission. In practice however, the button can be depressed at any time and the next master multipulse reading on the display register 150 is 00.0 or 23.9. The required correction is thus set into the phase store 170. The count remains in the store 170 and is used for correction of each subsequent count in the store register 144.

The output on the display register 150 is visually indicated on the three tubes of the number tube display 17 (FIG. 1). In FIG. 5, these three tubes are shown at 174, 175 and 176, having associated binary-codeddecimal to decimal converters 177, 178 and 179 respectively. The master red, green and purple indications are displayed in sequence in that order, at 2.5 second intervals with a longer interval before the cycle repeats in its 20 second period. Because the numerical values of the green readings must be between 30 and 47.9 and the purple readings between 50 and 79.9, the various readings can readily be distinguished. However, to avoid any possible confusion between the master reading (which is 00.0 or 23.9 after the correction has been set in) and the red reading, the display is made to blink during the master indication, a suitable control signal being obtained from the switching logic 147. The displayed lane identification information is used to set in the lane readings on the indicators B5 of the decometers 12, 13, 14 using the manual control knob 180 on the respective decometers.

I claim:

1. In a receiver for a phase comparison radio navigation system of the kind in which fixed stations normally radiate signals, one from each station, on different harmonics of a common radiation fundamental frequency and in which, for lane identification, each station periodically radiates signals of two or more frequencies from which a signal of the fundamental frequency may be derived at the receiver, said receiver having an oscillator locked in phase to signals of the one frequency normally radiated from one station, and a divider for dividing down the output from the oscillator to the fundamental frequency, the improvement comprising the provision of means for determining the phase relation between the fundamental frequency signal derived from the multiple frequency transmissions from said one station and the fundamental frequency signal from the divider and means for automatically applying this phase determination as a correction to determinations of the phase relation between the divider output and the fundamental frequency signals derived from the multiple frequency transmissions from each of the other stations.

2. A receiver as claimed in claim 1 wherein said divider is a digital divider of the cycle counter type providing a chain of short duration pulses at the fundamental frequency.

3. A receiver as claimed in claim 1 wherein said means for determining the phase relation between the fundamental frequency signal derived from the multiple frequency transmissions from said one station and the fundamental frequency signal from the divider comprises a clock pulse source and a phase correction register coupled to the clock pulse source for counting clock pulses and gating means controlling the feed of clock pulses to the register in accordance with the time period corresponding to the phase difference to be measured.

4. A receiver as claimed in claim 3 wherein said clock pulses are derived from a clock pulse source having a frequency which is a multiple of the fundamental frequency.

5. A receiver as claimed in claim 3 and for use in a system having a master station normally radiating on the sixth harmonic of said common radiation fundamental frequency and slave stations normally radiating on the fifth,-eighth and ninth harmonics wherein the clock pulse source has a frequency three hundred times the receiver fundamental frequency.

6. A receiver as claimed in claim 3 wherein the means for determining the phase relation between the divider output and the fundamental frequency signal derived from the multiple frequency transmissions from each-of the stations other than said one station comprises the clock pulse source, a register coupled to the clock pulse source for counting clock pulses, gating means controlled in accordance with the phase dif-' ference to be measured for admitting clock pulses to the register for the time period corresponding to the phase difference to be measured and means for correcting the count using the number in the phase correction register.

7. A receiver as claimed in-claim 6 wherein means are provided in each cycle of the multiple frequency signals for determining and indicating the phase relation between the divider output and the fundamental frequency signal derived from the multiple frequency transmissions with the correction from said phase correction register applied.

8. A receiver as claimed in claim 3 wherein a manually controlled switch is provided for initiating the effecting of the phase determination between the divider output and the fundamental frequency transmissions from said one station.

9. In a receiver for a phase comparison radio navigation system of the kind in which fixed stations normally radiate signals, one from each station, on different harmonics of a common radiation fundamental frequency and in which, for lane identification, each station periodically radiates signals of two or more frequencies from which a signal of the fundamental frequency can be derived at the receiver, said receiver having an oscillator locked in phase to signals of the one frequency normally radiated from one station and a divider for dividing down the output from the oscillator to the fundamental frequency, the improvement comprising the provision of a clock pulse source providing pulses at a frequency much higher than said fundamental frequency, a measurement register coupled to said clock pulse source by means including first gating means, timing means responsive to the fundamental frequency signal derived at the receiver from the signals from the various stations and to the fundamental frequency signal from the divider to open said first gating means for a time period corresponding to the phase relation of these fundamental frequency signals during each lane identification transmission, a phase store, second gating means controlling the admission of clock pulses from said clock pulse source to said phase store, manually operable switch means, a phase correction timing circuit connected to the switch means to be operably responsive, when the switch means are actuated, to respond to the fundamental frequency signal derived at the receiver from one station and to the fundamental frequency signal from the divider to open said second gating means for a time period corresponding to the phase relation of these two signals, and

means for automatically applying the count in said phase store as a correction to the count in said measurement register. 5 

1. In a receiver for a phase comparison radio navigation system of the kind in which fixed stations normally radiate signals, one from each station, on different harmonics of a common radiation fundamental frequency and in which, for lane identification, each station periodically radiates signals of two or more frequencies from which a signal of the fundamental frequency may be derived at the receiver, said receiver having an oscillator locked in phase to signals of the one frequency normally radiated from one station, and a divider for dividing down the output from the oscillator to the fundamental frequency, the improvement comprising the provision of means for determining the phase relation between the fundamental frequency signal derived from the multiple frequency transmissions from said one station and the fundamental frequency signal from the divider and means for automatically applying this phase determination as a correction to determinations of the phase relation between the divider output and the fundamental frequency signals derived from the multiple frequency transmissions from each of the other stations.
 2. A receiver as claimed in claim 1 wherein said divider is a digital divider of the cycle counter type providing a chain of short duration pulses at the fundamental frequency.
 3. A receiver as claimed in claim 1 wherein said means for determining the phase relation between the fundamental frequency signal derived from the multiple frequency transmissions from said one station and the fundamental frequency signal from the divider comprises a clock pulse source and a phase correction register coupled to the clock pulse source for counting clock pulses and gating means controlling the feed of clock pulses to the register in accordance with the time period corresponding to the phase difference to be measured.
 4. A receiver as claimed in claim 3 wherein said clock pulses are derived from A clock pulse source having a frequency which is a multiple of the fundamental frequency.
 5. A receiver as claimed in claim 3 and for use in a system having a master station normally radiating on the sixth harmonic of said common radiation fundamental frequency and slave stations normally radiating on the fifth, eighth and ninth harmonics wherein the clock pulse source has a frequency three hundred times the receiver fundamental frequency.
 6. A receiver as claimed in claim 3 wherein the means for determining the phase relation between the divider output and the fundamental frequency signal derived from the multiple frequency transmissions from each of the stations other than said one station comprises the clock pulse source, a register coupled to the clock pulse source for counting clock pulses, gating means controlled in accordance with the phase difference to be measured for admitting clock pulses to the register for the time period corresponding to the phase difference to be measured and means for correcting the count using the number in the phase correction register.
 7. A receiver as claimed in claim 6 wherein means are provided in each cycle of the multiple frequency signals for determining and indicating the phase relation between the divider output and the fundamental frequency signal derived from the multiple frequency transmissions with the correction from said phase correction register applied.
 8. A receiver as claimed in claim 3 wherein a manually controlled switch is provided for initiating the effecting of the phase determination between the divider output and the fundamental frequency transmissions from said one station.
 9. In a receiver for a phase comparison radio navigation system of the kind in which fixed stations normally radiate signals, one from each station, on different harmonics of a common radiation fundamental frequency and in which, for lane identification, each station periodically radiates signals of two or more frequencies from which a signal of the fundamental frequency can be derived at the receiver, said receiver having an oscillator locked in phase to signals of the one frequency normally radiated from one station and a divider for dividing down the output from the oscillator to the fundamental frequency, the improvement comprising the provision of a clock pulse source providing pulses at a frequency much higher than said fundamental frequency, a measurement register coupled to said clock pulse source by means including first gating means, timing means responsive to the fundamental frequency signal derived at the receiver from the signals from the various stations and to the fundamental frequency signal from the divider to open said first gating means for a time period corresponding to the phase relation of these fundamental frequency signals during each lane identification transmission, a phase store, second gating means controlling the admission of clock pulses from said clock pulse source to said phase store, manually operable switch means, a phase correction timing circuit connected to the switch means to be operably responsive, when the switch means are actuated, to respond to the fundamental frequency signal derived at the receiver from one station and to the fundamental frequency signal from the divider to open said second gating means for a time period corresponding to the phase relation of these two signals, and means for automatically applying the count in said phase store as a correction to the count in said measurement register. 